Custom Thin Base Platform - 2024.2 English - XD100

Vitis Tutorials: AI Engine Development (XD100)

Document ID
XD100
Release Date
2024-12-06
Version
2024.2 English

The GENERATED Custom Thin Base Platform BD: ../../../../_images/base_platform_bd.png

It exposes 5 clocks that can be used in the [project-root]/vitis/src/system.cfg:

[clock]
#id=0 -> clk_out1_o1 -> 500.00MHz
id=0:subtractor_0,counter_0

#id=1 -> clk_out1_o2 -> 250.00MHz
id=1:vadd_mm_1

#id=2 -> clk_out1_o3 -> 125.00MHz

#id=3 -> clk_out1_o4 -> 62.50MHz

#id=4 -> clk_out2 -> 333.33MHz
id=4:vadd_s_1,mm2s_vadd_s_1,mm2s_vadd_s_2,s2mm_vadd_s_1

Vitis will nicely add and change all required ip and connections depending on the added kernels and their needed clocks/resets onto this GENERATED Custom Thin Base Platform.