In some cases, it can be useful to add debug capabilities to the interfaces to monitor the data that is going in and out of the array. One way of adding the debug capabilities is to add the ILAs directly into the Vivado design. This is what is done in this part using the design from Part 1:
While the Vivado contains a slight change, the Vitis project can be similar to the one from Part 1.
To build the full project, including the Vivado HW design and the Vitis project, run the following command:
make all INCLUDE_ILAS=1