Considered Case Study - 2024.2 English - XD100

Vitis Tutorials: AI Engine Development (XD100)

Document ID
XD100
Release Date
2024-12-06
Version
2024.2 English

The considered case study for this tutorial is a real-time system comprising:

  • 128 parallel signals, at a

  • 125 MSa/s sample rate each, with

  • CINT16 datatype (16 bits for the real part and 16 bits for the imaginary part) for both twiddle factors and data.

The total required I/O bandwidth, thus minimum throughput, is thus 16 GSa/s or 64 GByte/s.