The following diagram explains the build-flow dependencies. Notes: The diagram should be read from right to left. The diagram is for illustration only. The actual build-flow is more sequential. SD CardVitisPackagingPS AppsUser Managed AppsXRT AppsRT AppsA72 / R5 DomainsVitisLinkerIPAIE DesignAIE GraphsAIE KernelsHLS KernelsHLS SourceHLS DirectivesRTL KernelsRTL PackageRTL SourceConstraintsTCL HooksPre/Post SynthTiming etc.System ConfigVitis PlatformSW PlatformPetalinuxVivadoHW PlatformBlock DesignRTL ModulesClockCIPSResetNoCDDR MEMAIE PlaceholderAXI SMCAXI IRQTCL hooksConstraintsPFM PropertiesSystem HW EmulationCo-sim