Buffer descriptors are a set of registers that exist within Memory Modules, Memory Tiles and AI Engine-ML Interfaces that allows DMA programming. It is a way to program the address generator so that data can be read or written from/to the memory. It describes an access scheme that is repeated over and over.
The number of MM2S/S2MM and buffer descriptors is different in the 3 different domains:
Location |
Number of MM2S/S2MM |
Number of BDs |
AI Engine |
AI Engine-ML |
|---|---|---|---|---|
Memory Module |
2/2 |
16 |
✓ |
✓ |
Memory Tile |
6/6 |
48 (24+24) |
NA |
✓ |
AI Engine Array Interface |
2/2 |
16 |
✓ |
✓ |
In memory modules and Array Interface, the 16 BDs can be accessed by all MM2S and S2MM. In Memory tiles, the BDs and DMA channels are split in 2 sets:
S2MM and MM2S index 0, 2, 4 can access BD from 0 to 23
S2MM and MM2S index 1, 3, 5 can access BD from 24 to 47