The vector unit in the first generation AI engine architecture supports the datatypes shown in Figure 6.
Figure 6: Datatypes supported in the vector unit of the 1st generation AIE architecture
Note that the rightmost column shows the number of multiply accumulate (MAC) operations that one tile can perform in one cycle. Thus, with 8-bit operands, one AIE tile can perform 128 MACs/cycle. Figure 7 shows what calculation is actually performed in one cycle.
Figure 7: Int8 MACs/cycle for 1st generation AIE architecture
Applications using matrix-matrix or matrix-vector multiplications, such as polyphase filters (channelizers), FIR/IIR filters, FFTs, beamforming, MIMO signal processing, and many others can benefit by using AI Engines.
Other tasks like image, video, audio processing, scientific simulations, data compression, networking, speech recognition, machine learning, cryptography and others can also take advantage of the SIMD capabilities of the AI Engine.
Note that “peak theoretical compute capability” mentioned in Figure 7 is an upper bound, and can never be realized when solving a practical problem. There are periods when you cannot perform calculations to enable data ingress and egress, or when the compute units need to wait for the results of a previous operation to become available.