AIE-ML v2 Design Tutorials - AIE-ML v2 Design Tutorials - 2026.1 English - XD100

Vitis Tutorials: AI Engine Development (XD100)

Document ID
XD100
Release Date
2026-06-23
Version
2026.1 English

The AI Engine Development Design Tutorials showcase the two major phases of AI Engine-ML v2 application development: architecting the application and developing the kernels. These tutorials demonstrate both phases.

Tutorial Description
Radio-ML on AIE-ML v2 This tutorial implements a Convolutional Neural Network classifier on AMD Versal™ AI Edge Series Gen 2 for radio signal classification.
Channelizer on AIE-ML v2 using Vitis Libraries This tutorial demonstrates how to port an AIE-ML reference design to AIE-ML v2 with minimal code changes. You do this by leveraging Vitis Libraries which contain templatized DSP IPs that allow you to target all AI Engine variants.
Fractional Delay Farrow Filter on AIE-ML v2 This tutorial shows how to migrate the global memory input/output (GMIO)-based design from the AIE-ML architecture to the AIE-ML v2 architecture.

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