Build the Hardware project for the graph by clicking on “Build” under the “AIE SIMULATOR / HARDWARE” tab on the “FLOW” menu located on the bottom left corner of the GUI.
When the build finishes, under the “REPORTS” tab in the “FLOW” menu, click “array” and check the AI Engine utilization. Observe in particular the mapping and routing for the 64 kernels and of the shared buffers.
Fig. 7: Vitis AI Engine array view of the implemented graph.
Create a new “AIESim” run in the
launch.json
file, by clicking on the “+” (“Add Configuration”) icon at the top of the interface.Enable tracing for the simulation, selecting the “aiesim” run and clicking “Enable Trace”.
Fig. 8: Creating a new run and enabling trace for AI Engine simulation.
Run the AI Engine simulation by clicking “Run” under the “AIE SIMULATOR / HARDWARE” tab on the “FLOW” menu.
When the simulation ends, open the Trace reports and collapse all the signals, as shown in the following figure.
Fig. 9: Opening and analyzing the AIE simulator trace report.
Note that the kernels are running for less than 25% of the time, being locked for the remaining time. Moreover, the memory tiles are almost empty because each shared buffer serves four kernels, thus the shared buffer mapping to the memory tiles is highly port-limited. Considering the previous validation steps, it can be concluded that the design is functionally correct, but a further optimization can be performed. Indeed, because the AIE-ML is much faster than the data rate, the computation can be serialized, reducing utilization and power consumption. To look into the optimization step, see the final step of this tutorial.