AI Engine tools support one-to-one mapping between global memory input/output (GMIO) ports and tile direct memory access (DMA) units. They do not support mapping multiple GMIO ports to one tile DMA channel. Each device supports a limited number of GMIO ports. For example, the XCVC1902 device on the VCK190 board has 16 AI Engines connected to a network on chip (NoC) master unit (NMU). Each AI Engine to NMU supports two memory‑mapped to stream (MM2S) and two stream to memory‑mapped (S2MM) channels. Therefore, the maximum is 32 AI Engine GMIO inputs and 32 AI Engine GMIO outputs. Hardware platform constraints can further reduce these limits.
In this example, you use four AI Engine GMIO inputs and four AI Engine GMIO outputs in the graph. You profile the graph’s performance using various methods. This tutorial teaches you how to use GMIO for data transfer.