2. Use V++ to Link AI Engine, HLS Kernels with the Platform - 2025.1 English - XD100

Vitis Tutorials: AI Engine Development (XD100)

Document ID
XD100
Release Date
2025-08-25
Version
2025.1 English

After the AI Engine kernels, graph, PL kernel, and HLS kernels have been compiled and simulated, you can use v++ to link them with the platform to generate an .xsa.

Use the system.cfg configuration file to connect the AI Engine and PL kernels in the design.

[connectivity]
nk=mm2s:1:mm2s
nk=s2mm:1:s2mm
sc=mm2s.s:ai_engine_0.DataIn1
sc=ai_engine_0.DataOut1:s2mm.s

To build the design, run the following command:

make xsa TARGET=hw_emu

or

v++ -l --platform $PLATFORM_REPO_PATHS/xilinx_vek280_base_202510_1/xilinx_vek280_base_202510_1.xpfm s2mm.xo mm2s.xo libadf.a -t hw_emu --save-temps -g --config system.cfg -o tutorial.xsa

Now you have a generated .xsa that will be used to execute your design on the platform.