When the native video interface is selected, the subsystem is packaged with two mandatory sub-cores:
- DisplayPort RX core
- AXI IIC controller
- HDCP core with AXI Timer when HCDP feature is enabled
Because the DisplayPort 2.1 RX Subsystem is hierarchically packaged, the subsystem creates the required hardware after you select the parameters. The following figure shows the subsystem architecture for MST with four native video streams.
The DisplayPort 2.1 RX Subsystem receives the video using the DisplayPort 2.1 protocol over a 128-bit video PHY interface. The subsystem works with the Video PHY controller configured for DisplayPort protocol. The subsystem outputs multi-pixel video to the AXI4-Stream interface.
Figure 1. DisplayPort 2.1 RX Native Video Block Diagram
