Building the Example Design - 1.0 English - PG422

DisplayPort 2.1 RX Subsystem Product Guide (PG422)

Document ID
PG422
Release Date
2025-11-26
Version
1.0 English
  1. Open the AMD Vivado™ Design Suite and click Create Project.
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  2. In the New Project window, enter a Project name, Project location, and then click Next up to the Board/Part selection window.

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  3. In the Default Part window, select the Board as per your requirement. Application Example Designs are available for ZCU102, VCU118.
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  4. Click Finish.
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  5. In the Flow Navigator window, click Create Block Design (BD). Select a name for the Block Design and click OK.

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  6. Right-click BD and click Add IP. Search for DisplayPort 2.1 and select the DisplayPort 2.1 Receiver Subsystem IP (for RX only ZCU102, VCU118 designs).
  7. Double-click the IP and go to the Application Example Design tab in the Customize IP window. Select the supported topology in the Application Example Design drop-down box. Click OK and Save the block design.
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  8. Right-click the DisplayPort Subsystem IP under Design source in the Design tab and click Open IP Example Design.
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  9. Choose Example project directory and click OK.
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  10. The following figure shows the Vivado IP integrator design. Choose the Generate Bitstream.
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  11. Export the hardware (XSA) to AMD Vitis™ software platform. Click File > Export > Export Hardware.
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    Classic Vitis Flow:

  12. Launch the Vitis software platform from command line. Set up a workspace and create a platform project using exported xsa.
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