DisplayPort Sink device receives MAUD and NAUD values from the upstream source device. These values are accessible to the system through the output ports and registers.
The system should have a clock generator (preferably programmable) to generate 512 × fs (Audio Sample Rate) clock frequency based on MAUD and NAUD values. An External clock source is preferred for better precision.
In 128b/132b DP Link Layer, the MAUD and NAUD fields are combined to form a 48-bit field, AFREQ [47:0]. They carry the rate (in Hz) of the absolute Primary audio clock, which is 512 times the audio sample frequency.
Figure 1. Audio Clocking for Sink
