Product Specification - Product Specification - PG457

800G IEEE 802.3df Reed-Solomon Forward Error Correction LogiCORE IP Product Guide (PG457)

Document ID
PG457
Release Date
2025-11-20
Revision
1.0 English

The functional block diagram of the core is shown in the following figure.

Figure 1. Functional Diagram

The 800G RS-FEC block performs the following functions:

  • TX Pre-FEC Distribution
  • TX parity insertion
  • FEC encode
  • TX distribution and interleave
  • RX alignment lock
  • RX lane deskew
  • RX lane re-order and de-interleave
  • FEC decode
  • RX codeword distribution and parity removal