For details about performance, see Performance and Resource Utilization web page.
Latency
The following table shows the latency of the transmit and receive paths of the 800G Ethernet RS-FEC IP core.
The FEC IP measures latency from input to output and does not include the latency of the transceivers used for serial I/O. The latency through the DCMAC is included in these figures.
| Path | Latency (Clock Cycles) | Latency (ns @ 332.03125 MHz) |
|---|---|---|
| Transmit path | 66 | 198.9 |
| Receive path | 80 | 240.9 |