Alignment Marker (AM) Data - Alignment Marker (AM) Data - PG457

The 48-bit rx_port<N>_marker_common and rx_port<N>_marker_id{0-31} signals specify the alignment marker (AM) values used for lane alignment, deskew, and reordering. The standard AM values are available at Table 172-2 of IEEE 802df-2024 standard for Ethernet (https://standards.ieee.org/ieee/802.3/11107/).

Following the IEEE notation, each marker should be provided to the core as a sequence of bytes that are assumed to be transmitted from left to right, but with the bits of each byte transmitted from right to left (that is, LSB first). The unique padding bits UP₀, UP₁, and UP₂ that occur within the alignment markers are omitted, as are the variable PRBS padding blocks that occur at the end of each alignment marker group.

To obtain the standard behavior, rx_port<N>_marker_common must be assigned the value {CM₀,CM₁, CM₂, CM₃, CM₄, CM₅}, such that rx_port<N>_marker_common[47:40] is equal to CM₀ and rx_port<N>_marker_common[7:0] is equal to CM₅. Similarly, rx_port<N>_marker_id{x} must be assigned the value {UM₀, UM₁, UM₂, UM₃, UM₄, UM₅}, such that rx_port<N>_marker_id{x}[47:40] is equal to UM₀ for lane x and rx_port<N>_marker_id{x}[7:0] is equal to UM₅ for lane x.

The values of the AM signals that are required for standards-compliant operation are shown in the following table.