Click the RAM tab on the left navigation pane to set the following RAM settings:
- Clock Control
- DRAM Timing Configuration
Clock Control
| Parameter | Description |
|---|---|
| Memory Clock | Specify the target memory speed in MHz or MT/s on a
supported processor. To set the unit as MHz or MT/s, navigate to the
Settings tab and set
Clock Unit Type under
Memory Units. Set the required frequency within the allowed limits in MT/s or MHz. |
| Fabric Clock | Specify the Fabric
Clock frequency in MHz on a supported processor. By
default, this option is switched off. Use the slider to switch it on. Set the required frequency within the allowed limits in MHz. Tip: You can click inside the spin box and use your mouse
scroll to cycle through the values you can set.
|
| U Clock Mode | By default, this option is switched off. Use the slider to switch it on. Then select the Min or Max values: Off or On, respectively. |
| U Clock |
U Clock value expressed in MT/s or MHz. |
Voltage
| Parameter | Description |
|---|---|
| Couple Mode | For CPUs on supported processor, you can set it ON
or OFF.
|
| PMIC VDD | PMIC VDD |
| VDDQ | Adjust DIMM DQ Power Supply. |
| APU VDDIO/VDD 11 S3 | Adjust the VDDIO voltage/Supplies power to DDR PHY I/O. |
| VDD MISC | VDD Misc Voltage. |
| VDDCR SOC | VDDCR SOC |
| CLDO VDDP | CLDO VDDP |
| CLDO VDDG Per CCD | CLDO VDDG CCD |
| CLDO VDDG Per IOD | CLDO VDDG IOD |
| MEM VPP | MEM VPP |
Tip: Position the cursor over the
parameter to display its range and step size.
DDR Nitro Mode
| Parameter | Description |
|---|---|
| Nitro RX Data | Configures the RX timing between memory controller and PHY |
| Nitro TX Data | Configures the TX timing between memory controller and PHY |
| Nitro Control Line | Configures the command timing latency between the memory controller and PHY |
| DDR5 Robust Training Mode | A more comprehensive memory training algorithm that increases boot time but can result in improved stability at overclocked memory settings |
DRAM Timing Configuration
You can set the following DRAM timing configuration values:
| Parameter | Description |
|---|---|
| Tcl | CAS Latency (Bus Clocks). |
| Trcd | Row Address to Column Address Delay (Clock Cycles). |
| Trp | Row Precharge Delay (Bus Clocks). |
| Tras | RAS Active Time (Bus Clocks). |
| Trc | Row Cycle Time (Bus Clocks). |
| Trfc | Refresh Recovery Delay Time (Clock Cycles). |
| Tfaw | Four Activate Windows Time (Clock Cycles). |
| TrrdS | Activate to Activate Delay Time, different bank group (tRRD_S) (Clock Cycles). |
| TrrdL | Activate to Activate Delay Time, same bank group (tRRD_L) (Clock Cycles). |
| Twr | Minimum Write Recovery Time (Clock Cycles). |
| TwtrS | Minimum Write to Read Time, different bank group (Clock Cycles). |
| TwtrL | Minimum Write to Read Time, same bank group (Clock Cycles). |
| Trtp | Read CAS# to precharge time (Clock Cycles). |
| TrdrdSc | Read to Read timing same chip select (Clock Cycles). |
| TrdrdScL | Read to Read timing same chip select same bank group (Clock Cycles). |
| TrdrdSd | Read to Read timing same DIMM (Clock Cycles). |
| TrdrdDd | Read to Read timing different DIMM (Clock Cycles). |
| TwrwrSc | Write to Write timing same chip select (Clock Cycles). |
| TwrwrScL | Write to Write timing same chip select same bank group (Clock Cycles). |
| TwrwrSd | Write to Write timing same DIMM (Clock Cycles). |
| TwrwrDd | Write to Write timing different DIMM (Clock Cycles). |
| Trdwr | Read to Write timing (Clock Cycles). |
| TrfcSb | Refresh Recovery Delay Time (Clock Cycles). |
| Twrrd | Write to read timing (Clock Cycles). |
Tip: Position the cursor over the
parameter to display its range and step size.
DRAM Controller Configuration
| Parameter | Description |
|---|---|
| DRAMDataDrive Strength | DRAMDataDrive Strength expressed in ohms. |
| Power Down Enable | Enable or disable DDR power down mode. |
| PROCDataDrive Strength | PROCDataDrive Strength expressed in Ohms. |
| CPU On-Die Termination | CPU On-Die Termination expressed in Ohms. |
| DRAMDataDriveStrength_PullUp | Specifies the Dram DQ drive strengths Pull Up P0 |
| DRAMDataDriveStrength_PullDown | Specifies the Dram DQ drive strengths Pull Down P0 |
| PROCODT_PullUp | Specifies the Processor ODT Impedance Pull Up P0 |
| PROCODT_PullDown | Specifies the Processor ODT Impedance Pull Down P0 |
| PROCDataDriveStrength_PullUp | Specifies the Processor DQ drive strengths Pull Up P0 |
| PROCDataDriveStrength_PullDown | Specifies the Processor DQ drive strengths Pull Down P0 |
Tip: Position the cursor over the
parameter to display its range and step size.
Data Bus Configuration User Controls
| Parameter | Description |
|---|---|
| RttWr | DRAM Termination RTT_Wr. |
| RttNomWr | DRAMs On-die Termination impedance for RTT_NOM_WR. |
| RttNomRd | DRAMs On-die Termination impedance for RTT_NOM_RD. |
| RttParkDqs | DRAMs On-die Termination impedance for DQS_RTT_PARK. |
| RttPark | DRAM Termination RTT_Park. |
Tip: Position the cursor over the
parameter to display its range and step size.
CAD Bus Drive Strength
| Parameter | Description |
|---|---|
| AddrCmdDrvStren |
AddrCmdDrvStren value expressed in ohms. |
| PROC_CS_DriveStrength | Specifies the Processor CS drive strength. |
| PROC_CK_DriveStrength | Specifies the Processor CK drive strength. |
Tip: Position the cursor over the
parameter to display its range and step size.
CAS Latency Bus Clocks
By default, this option is switched off. Use the slider to switch it on.
Set the required value within the allowed limits.
Tip: You can click inside the spin box
and use your mouse scroll to cycle through the values you can set.