12.4.1. Dynamic Dispatch - 12.4.1. Dynamic Dispatch - 5.3 English - 57404

Dynamic Dispatch facilitates building a single binary compatible with all AMD “Zen” architectures and non-AMD systems. At runtime, this feature enables optimizations specific to the detected CPU architecture or ISA capabilities.

The library automatically detects the CPU architecture at runtime and dispatches to the most optimized code path available for:

• AMD Zen (Zen1 - baseline AVX2 optimizations)

• AMD Zen2 (AVX2 optimizations)

• AMD Zen3 (Enhanced AVX2 optimizations)

• AMD Zen4 (AVX-512 optimizations)

• AMD Zen5 (Enhanced AVX-512 optimizations)

• AVX-512 (Non-Zen Systems with AVX-512 support)

• AVX-512 disabled on Zen4 or Zen5 systems

  • Zen4 and Zen5 platforms offer a BIOS option to disable AVX-512 at boot. When AVX-512 is disabled, the CPU operates using the AVX2 ISA. If an application calls vrd8/vrs16 APIs on a machine running in AVX2-only mode, the process will raise SIGILL (illegal instruction).

  • To handle this, when a Zen4 or Zen5 CPU is detected the library performs a runtime check to determine if AVX-512 is enabled.

    • If AVX-512 is enabled, the library selects the most optimized Zen4 or Zen5 code path respectively.

    • If AVX-512 is disabled, the library selects the most suitable Zen3 (AVX2) code path to avoid SIGILL (illegal instructions) for all APIs other than vrd8/vrs16.

• Unknown (non-Zen) CPUs

  • CPUs that are not recognized as Zen-series are treated as “Unknown machine”. For unknown machines, the library predicts the best dispatch code path. If the prediction is incorrect, calls may still trigger SIGILL.

  • To reduce that risk, when an unknown CPU is detected the library performs a runtime check to determine whether AVX-512 is enabled.

    • If AVX-512 is available (avx512f and avx512dq flags detected), the library selects the portable AVX-512 ISA code path.

    • If AVX-512 is not available, it falls back to an AVX2 code path.

• Accidental use of vrd8/vrs16 APIs on AVX2-only systems

  • If an application uses vrd8/vrs16 API variants from LibM while being compiled for an AVX2-only target, it will lead to compile-time errors in the application, due to checks under LibM header file.

  • If your application is pre-compiled and contains calls to vrd8/vrs16 APIs and then runs on an AVX2-only machine, the process will raise SIGILL at runtime.

• Recommendations

  • If applications need to use the vrd8/vrs16 API variants, build and run only on validated AVX-512–capable systems, or detect AVX-512 availability at application startup and avoid calling AVX-512–specific APIs when unavailable.

  • When deploying to Zen4/Zen5 hardware, verify BIOS settings to ensure AVX-512 is enabled.

• Behavior Summary

Case	CPU Type	ISA Status	Expected Dispatch Behavior
1	Zen4 or Zen5	AVX-512 enabled	Zen4/Zen5 optimized AVX-512 dispatch selected
2	Zen4 or Zen5	AVX-512 disabled	Zen3 (AVX2) dispatch selected
3	Unknown CPU	AVX-512 available	Portable AVX-512 ISA dispatch selected
4	Unknown CPU	AVX-512 unavailable	AVX2 dispatch selected