Target Selection - Target Selection - 57222

AOCC User Guide

Document_ID
57222
Release_Date
2026-05-12
Revision
5.2 English
The following is a list of Target Selection options.
  • -march=<cpu>

    Enables Clang/Flang to generate code for a specific processor of a family. For example, if you specify -march=znver1, the compiler can generate instructions that are valid on AMD 17h and later processors.

  • -march=znver1

    Use this architecture option to enable the best code generation and tuning for AMD “Zen”-based x86 architecture. All the x86 AMD “Zen” ISA and associated intrinsics are supported.

  • -march=znver2

    Use this architecture option to enable the best code generation and tuning for AMD “Zen2”-based x86 architecture. All x86 AMD “Zen2” ISA and associated intrinsics are supported.

  • -march=znver3

    Use this architecture option to enable the best code generation and tuning for AMD “Zen3”-based x86 architecture. All x86 AMD “Zen3” ISA and associated intrinsics are supported.

  • -march=znver4

    Use this architecture option to enable the best code generation and tuning for AMD “Zen4”-based x86 architecture. All x86 AMD “Zen4” ISA and associated intrinsics are supported.

  • -march=znver5

    Use this architecture option to enable the best code generation and tuning for AMD “Zen5”-based x86 architecture. All x86 AMD “Zen5” ISA and associated intrinsics are supported.

  • -march=native

    Use this architecture option to generate code at compilation time by determining the processor type of the compiling machine. Using -march=native enables all instruction subsets supported by the local machine.