000037870 - Versal Prime XCVM2152 - Missing timing arcs and MIPI IP patches - The XCVM2152 device speed files have three Known Issues in the 2025.1 and 2024.2.x releases:
When using Octads 4,6,7 with the FIFO_WR_CLK used for the FIFO_RD_CLK which is used in MIPI, there are timing issues with the FIFO_WR_CLK which results in Critical Warnings in 2025.1.
When using the X5PLL Dynamic Reconfiguration or Phase shifting, some paths might not be timed correctly.
MIPI C-PHY IP with multi-lanes (or multi-trios) configuration is not supported.
- Release Date
- 2025-09-11
- Revision
- 1.0 English