The attached tactical patch resolves the incorrect VREF_CA programming for dual-channel LPDDR4 and LPDDR4X designs in Vivado 2024.2 and minor releases when operating at 2400Mbps and above.
All designs meeting these criteria are encouraged to use the patch even if the LPDDR4/LPDDR4X interface seems reliable because the VREF_CA margin is significantly reduced and could cause problems with larger hardware populations in more extreme operating conditions.
This issue is resolved in Vivado 2025.1.
Single channel LPDDR4 and LPDDR4X interfaces are not exposed to this behavior.
DDR4 configurations are not impacted by this behavior.
Revision History:
05/02/2025 - Initial Release