Description - Description

000037142 - Design Advisory for Versal GTM (2024.2): LCPLL0 and LCPLL1 reset not independent

Release Date
2025-01-24
Revision
1.0 English

Version Found: Vivado 2024.2, GT Wizard Version 1.1 (Rev. 17)

Version Resolved: See 000034042 - Versal Adaptive SoC GTM Transceivers Wizard and IBERT - Master Release Notes and Known Issues


This design advisory covers a Versal GTM LCPLL0/1 reset issue with the following symptoms:

  • For quad sharing designs where Dual0 PORT uses LCPLL0 and Dual1 PORT uses LCPLL1, a burst of high BER is seen on the Dual0 PORT when LCPLL1 of the Dual1 PORT is reset and vice versa.
  • Impacted resets are those involving LCPLL reset, (for example txmstreset and rxmstreset), or the use of these ports at the reset controller helper block input (reset_all, reset_tx_pll_and_datapath, and reset_rx_pll_and_datapath).
  • Issues are seen with master reset but not with non-master reset.

Designs with only one LCPLL used in the quad are not affected.