000035447 - Design Advisory - 2023.1.x (and prior) Vivado and Versal - timing of bypass BLI setup path and BUFGCTRL cascade are incorrect - In the Versal families there is a Boundary Logic Interface register (BLI). In 2022.1.x and prior versions of Vivado, if the BLI is bypassed for the paths listed in the table below, Vivado timing incorrectly analyzes the setup path, and is missing 250ps.

Release Date

2023-10-19

Revision

1.0 English