AXI4-Lite Interfaces
Read from a register that does not have all 0s as a default to verify that the interface is functional. See the folloeing figure for a read timing diagram. Output s_axi_arready asserts when the read address is valid, and output s_axi_rvalid asserts when the read data/response is valid. If the interface is unresponsive, ensure that the following conditions are met:
- The lite_aclk inputs are connected and toggling.
- The interface is not being held in reset, and lite_aresetn is an active-Low reset.
- The main subsystem clocks are toggling and that the enables are also asserted.
- If the simulation has been run, verify in simulation and/or a debug feature capture that the waveform is correct for accessing the AXI4-Lite interface.
Figure 1. AXI4-Lite Timing
AXI4-Stream Interfaces
If data is not being transmitted or received, check the following conditions:
- If transmit <interface_name>_tready is stuck Low following the <interface_name>_tvalid input being asserted, the subsystem cannot send data.
- If the receive <interface_name>_tvalid is stuck Low, the subsystem is not receiving data.
- Check that the video_aclk and dphy_clk_200M inputs are connected and toggling.
- Check subsystem configuration.
- Ensure “Stream line buffer full” condition not getting reported in subsystem Interrupt Status register.
- Sideband Information on AXI4-Stream Interfaces.
- Sideband information such as frame and line number appear on the TUSER signal of the AXI4-Stream interface.
- Start of fame, frame number, line number, word count, and data type need to be sampled by you on the first beat of the transfer.
- Frame Number and Line number is an optional information set by the TX. According to the MIPI CSI-2 specification, TX can send a fixed "0" if these information is not used.
- Packet Error, ECC, and CRC need to be sampled by you on the last beat of the transfer.
- The side band information are optionally sent by the sensor. Refer to the Low Level Protocol section of MIPI CSI-2 standard v2.0 for more details.
Figure 2. Sideband Information (TUSER) Timing Diagram
