When the core is configured with RAW6 and two pixels per clock, the video_out port width is set to 16 bits. Within the 16 bits, the RAW6 and RAW8 pixels are aligned to the most significant bits as shown in the following table.
| Bit Positions | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| RAW8 | q7 | q6 | q5 | q4 | q3 | q2 | q1 | q0 | p7 | p6 | p5 | p4 | p3 | p2 | p1 | p0 |
| RAW6 | q5 | q4 | q3 | q2 | q1 | q0 | p5 | p4 | p3 | p2 | p1 | p0 | ||||
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