Pin Assignment Tab - 5.1 English

MIPI CSI-2 Receiver Subsystem Product Guide (PG232)

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5.1 English

The Pin Assignment tab page allows to select pins. The subsystem pin assignment configuration screen is shown in This Figure .

Note: This tab is not available for 7 series device configurations.

Figure 4-4: Subsystem Customization Screen - Pin Assignment

X-Ref Target - Figure 4-4


HP IO Bank Selection: Select the HP I/O bank for clock lane and data lane implementation.

Clock Lane: Select the LOC for clock lane. This selection determines the I/O byte group within the selected HP I/O bank.

Data Lane 0/1/2/3: Displays the Data lanes 0, 1, 2, and 3 LOC based on the clock lane selection.