The following tables define the bit assignments for the statistics counters.
Counters are 48 bits and require two 32-bit address spaces containing
the MSB and LSB as indicated. The default value of all counters is 0. Counters are
cleared when read by tick_reg (or pm_tick if so selected) but the register containing the
count retains its value. Each counter saturates at FFFFFFFFFFFF (hex).
A description of each signal is found in Port Descriptions – MAC+PCS Variant.