The ERNIC IP implements RDMA queues like Receive Queue (RQ), Send Queue (SQ), and Completion Queue (CQ). These queues are referred to as Queue Pairs or QPs. SQ houses the send WQEs posted by the user application.
The RQ houses the incoming RDMA SEND packets. The completion queue informs the user application about the completed SEND WQEs. Each of these queues are implemented as circular buffers. Various doorbell and write pointer registers define the current state of these queues. This Figure shows the different queues and the variables/registers that define the state of the queues. The highlighted variables are indirectly accessed by the ERNIC IP. The register CQDBADDi points to the address for sq_cmpl_db and the RQWPTRDBADDi register points to the address for the rq_wrptr_db .
These queues are implemented in memory regions outside the ERNIC IP. The ERNIC accesses the IP through the various AXI master interfaces. See Table: ERNIC IP Memory Requirement for details of ERNIC memory requirements.
The next few sections provide a brief overview of the incoming (RX) and outgoing (TX) data flow of the ERNIC IP.