DPUCZDX8G with Enhanced Usage of DSP - 3.4 English

DPUCZDX8G for Zynq UltraScale+ MPSoCs Product Guide (PG338)

Document ID
PG338
Release Date
2022-01-20
Version
3.4 English

A DSP Double Data Rate (DDR) technique is used to improve the performance achieved with the device. Therefore, two input clocks for the DPUCZDX8G are needed: One for general logic and another at twice the frequency for DSP slices. The difference between a DPUCZDX8G not using the DSP DDR technique and a DPUCZDX8G enhanced usage architecture is shown here.

Note: All DPUCZDX8G architectures referred to in this document refer to DPUCZDX8G enhanced usage, unless otherwise specified.
Figure 1. Difference between DPUCZDX8G without DSP DDR and DPUCZDX8G Enhanced Usage