PS-PL Configuration - 3.4 English - PG201

Zynq UltraScale+ MPSoC Processing System Product Guide (PG201)
Document ID
PG201
Release Date
2022-05-11
Version
3.4 English

This page allows you to configure PS-PL interfaces including AXI, HP, and ACP bus interfaces.

Figure 4-13: PS-PL Configuration Page

X-Ref Target - Figure 4-13

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