Clock Configuration - 3.4 English - PG201

Zynq UltraScale+ MPSoC Processing System Product Guide (PG201)

Document ID
PG201
Release Date
2022-05-11
Version
3.4 English

This page enables you to configure the peripheral clocks, PL clocks, DDR, and CPU clocks. The PCW provides two options, Input Clocks and Output Clocks, to configure the various associated clocks.