CCI Enablement - 3.4 English

Zynq UltraScale+ MPSoC Processing System Product Guide (PG201)

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3.4 English

CCI Enablement option allows you to Enable/Disable the Cache coherency feature for the peripherals listed under this option. CCI provides the Cache coherency for the selected peripheral.

Figure 4-16: CCI Enablement Option

X-Ref Target - Figure 4-16


Using this wizard, you can achieve Cache coherency for the following scenarios:

Standalone: EL1 Non-secure (NS) bare metal applications.

Linux: Applications in Native Linux running at EL1 NS.