Low Power Domain Clocks - 3.3 English

Control Interfaces and Processing System LogiCORE IP Product Guide (PG352)

Document ID
PG352
Release Date
2023-05-16
Version
3.3 English
Processor/Memory Clocks
Clock configuration for the CPU_R5 Processor.
Peripherals/IO Clocks
Clock configuration for low-speed peripheral devices.
Interconnect and Switch Clocks
Clock configuration for interconnects and switches in LPD domain.
System Debug Clocks
Clock configuration for debug modules like DBG_LPD and DBG_TSTMP.