Full Power Domain Clocks - 3.3 English

Control Interfaces and Processing System LogiCORE IP Product Guide (PG352)

Document ID
PG352
Release Date
2023-05-16
Version
3.3 English
Processor/Memory Clocks
Clock configuration for APU, GPU, and DDR memory.
System Debug Clocks
Clock configuration for debug modules like DBG_FPD.
Interconnect and Switch Clocks
Clock configuration for interconnects and switches in FPD domain.