MAC Options Tab - 3.3 English - PG210

10G/25G High Speed Ethernet Subsystem Product Guide (PG210)
Document ID
PG210
Release Date
2020-12-16
Version
3.3 English

The MAC Options tab provides additional core configuration options.

Figure 1. MAC Options Tab (Versal)
Figure 2. MAC Options Tab (UltraScale/UltraScale+)
Table 1. MAC Options
Option Values Default
Optional Data Path Interface FIFO
Include FIFO Logic 1 Checked, Unchecked Checked
Flow Control
Enable TX Flow Control Logic Checked, Unchecked Unchecked
Enable RX Flow Control Logic Checked, Unchecked Unchecked
IEEE PTP 1588v2
Enable Timestamping Logic Checked, Unchecked Unchecked
Operation Mode

One Step

Two Step

 Two Step
1588 SYS Clock period in ps 2000 to 100000 4000 2
Enable Datapath Parity 0, 1 0
Enable Packet Assembly FIFO 0, 1 0
  1. This option will be available only when Base-R/BaseKR standard as Base-R and when this is unchecked then core will be in Low latency mode.
  2. 4000 for Versal devices and 10000 for non-Versal devices.