RESET_REG: 0004 - RESET_REG: 0004 - 3.2 English - PG211

40G/50G High Speed Ethernet Subsystem Product Guide (PG211)
Document ID
PG211
Release Date
2021-10-27
Version
3.2 English

This is a clear on write register. This is available when the Include ANLT Logic option selected in the Configuration tab.

Table 1. RESET_REG: 0004
Bits Default Type Signal
1:0 0 RW rx_serdes_reset
28 0 RW ctl_an_reset
29 0 RW tx_serdes_reset
30 0 RW rx_reset
31 0 RW tx_reset