Summary - 3.1 English

HDMI 1.4/2.0 Receiver Subsystem Product Guide (PG236)

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3.1 English

The HDMI 1.4/2.0 RX Subsystem allows users to customize the example design based on their system requirements. The following table shows a summary of the hardware required for each targeted board, supported processors, topologies, and the corresponding Vitis™ software platform import example options.

Table 1. Example Design Support Summary
Development Boards Additional Hardware Processor Topology Vitis Import Example
KC705/KCU105/VCU118 1 inrevium TB-FMCH-HDMI4K FMC daughter card MicroBlaze™ Pass-through Passthrough_Microblaze
RX Only


ZC706 A9 Pass-through Passthrough_A9
RX Only RxOnly_A9
ZCU102 2 /ZCU104/ZCU106 - A53 Pass-through Passthrough_A53
RX Only RxOnly_A53
Pass-Through Repeater_A53 3
Pass-Through + I2S Audio (ZCU102 Only) Passthrough_Audio_I2S_A53
R5 Pass-through Passthrough_R5
RX Only RxOnly_R5
VCK190/VMK180   A72 Pass-through Passthrough_A72
  1. For VCU118 board, no dedicated on-board GT reference clocks are available to support the HDMI Transmitter and NI-DRU on the HDMI Receiver simultaneously due to board design limitations. Therefore, if Pass-through topology is selected for the VCU118 board, NI-DRU is disabled.
  2. The HDMI + I2S-PMOD Audio can be generated only using the configurations in the following table.
  3. A dedicated repeater application is added to demonstrate repeater functionality. Note the following:
    • The Repeater feature has been removed from standard pass-through application for all supported processors.
    • This application passes repeater compliance tests (CTS) on SL8800 running on a ZCU102 A53 processor.
    • The same application can also be used for other applications.
    • You must increase the BRAM size from 512K to 1M in hardware IP integrator to run repeater function on the MicroBlaze™ processor. This is because that the repeater functionality is more complex and requires more resources.

This chapter covers the design considerations of a High-Definition Multimedia Interface (HDMI™) 2.0 implementation using the performance features of these Xilinx® subsystems and IP:

  • HDMI 1.4/2.0 with HDCP 1.4/2.3 Receiver Subsystem
  • HDMI 1.4/2.0 with HDCP 1.4/2.3 Transmitter Subsystem (For Pass-through topology only)
  • Video PHY Controller /HDMI GT Subsystem

The design features the receive-only and the pass-through operation modes for the HDMI solution. In the pass-through mode, an external HDMI source is used to send video data over the HDMI design. In the receive-only mode, an external HDMI source is used to send video data, and the HDMI Example design receives and detect the video. You can check the video information from the UART menu. However, in receive-only mode, there won't be video available for visual check. The example design demonstrates the use of the High-bandwidth Digital Content Protection System (HDCP) Revision 1.4/2.3 capability of the HDMI solution. HDCP is used to securely send audiovisual data from an HDCP protected transmitter to HDCP protected downstream receivers. Typically, HDCP 2.3 is used to encrypt content at Ultra High Definition (UHD) while HDCP 1.4 is used as a legacy encryption scheme for lower resolutions.