Navigating Content by Design Process - 3.1 English

HDMI 1.4/2.0 Receiver Subsystem Product Guide (PG236)

Document ID
PG236
Release Date
2020-12-11
Version
3.1 English

Xilinx® documentation is organized around a set of standard design processes to help you find relevant content for your current development task. This document covers the following design processes:

Hardware, IP, and Platform Development​
Creating the PL IP blocks for the hardware platform, creating PL kernels, subsystem functional simulation, and evaluating the Vivado® timing, resource use, and power closure. Also involves developing the hardware platform for system integration. Topics in this document that apply to this design process include: