INSTR_ADDR - 3.0 English

Vitis AI RNN User Guide (UG1563)

Document ID
UG1563
Release Date
2023-01-12
Version
3.0 English

The instr_addr register is used to indicate the DDR memory address of instructions for the DPU for the RNN kernel. The default width of the DDR memory address is 64-bit, so two 32-bit registers are used to represent the instruction address. The details of the instr_addr register are shown in the following table.

Bit Register Address R/W Description
31:0 INSTR_ADDR_H 0x1C R/W The higher 32 bits of instructions address in DDR. It is shared with model parameter address register.
31:0 INSTR_ADDR_L 0x20 R/W The lower 32 bits of instructions address in DDR.