This section describes the MAC interface (MAC I/F) signals.
Note: In these tables, <M> is the 64B/66B block number 0 to 23.
| Port Name | Clock Domain | I/O | Description |
|---|---|---|---|
| tx_macif_data_<M>[65:0] | tx_macif_clk | O | MAC I/F data block. |
| tx_macif_ena | tx_macif_clk | O | Enable/valid indication for the TX MAC I/F bus. |
| tx_macif_ts_id[5:0] | tx_macif_clk | O | Indicates the time-sliced channel ID for the data being presented. |
| tx_macif_ts_id_req_rdy | tx_macif_clk | O | Asserted by DCMAC Subsystem to indicate that it is ready to accept channel ID requests. |
| tx_macif_ts_id_req[5:0] | tx_macif_clk | I | Indicates which channel ID is next in sequence for the MAC I/F consumer. |
| tx_macif_ts_id_req_sic[5:0] | tx_macif_clk | I | Indicates amount of SIC adjustment that must be performed by the TSMAC for this channel. |
| tx_macif_ts_id_req_vld | tx_macif_clk | I | Validates tx_macif_ts_id_req. |
| Port Name | Clock Domain | I/O | Description |
|---|---|---|---|
| rx_macif_data_<M>[65:0] | rx_macif_clk | I | MAC I/F data block |
| rx_macif_ena | rx_macif_clk | I | Enable/valid indication for the RX MAC I/F bus |
| rx_macif_status | rx_macif_clk | I | Indicates channel status for the presented channel ID |
| rx_macif_ts_id[5:0] | rx_macif_clk | I | Channel ID |