Frame Receive with Errors - Frame Receive with Errors - 3.0 English - PG369

Versal Adaptive SoC 600G Channelized Multirate Ethernet Subsystem (DCMAC) LogiCORE IP Product Guide (PG369)
Document ID
PG369
Release Date
2025-06-11
Version
3.0 English

In the receive direction, the DCMAC Subsystem flags a frame as errored by asserting err in the final segment of the frame (ena and eop both asserted). The following conditions cause the assertion of err, signifying a bad frame:

  • FCS error detected and ctl_rx_ignore_fcs is 0.
  • Frame length exceeds the programmed maximum transmission unit (MTU) size (ctl_rx_max_frame_len).
  • HI_BER or loss_of_alignment happens in the PCS layer while receipt of the packet is in progress.
  • There is a transition from RX_D to RX_E in the decoder state machine as specified in the 802.3 standard.
In the event of a signaled error, the user logic is responsible for discarding the frame.
Note: The DCMAC Subsystem supports a minimum frame size of 64 bytes; any packet received smaller than 64 bytes is dropped internally, with a corresponding counter increment.