Message - Message - 2025.2 English - UG906

Vivado Design Suite User Guide: Design Analysis and Closure Techniques (UG906)

Document_ID
UG906
Release_Date
2025-12-10
Version
2025.2 English

One or more logic synchronizer has been detected between two clock domains but the synchronizer does not have the property ASYNC_REG defined on one or both registers. It is recommended to run report_cdc for complete and detailed CDC coverage.