Source files include design sources, intellectual property (IP) sources added from the AMD IP catalog, RTL design sources, digital signal processing (DSP) sources added from the System Generator tool, and IP subsystems, also known as block designs, created by the IP integrator feature of the AMD Vivado™ Design Suite. Source files also include simulation source files and constraints files that specify timing requirements for the design and physical constraints defining the AMD device resources used by the design. When working in Project Mode, you can create and add source files using the Vivado IDE, or using Tcl commands or scripts, and the Vivado IDE automatically manages your source files within the project. You can create and manage source files that are local to the current project, or remotely referenced from a library or separate directory. You can add Verilog, VHDL, and SystemVerilog source files to a project at any point in the design flow.
When working in Non-Project Mode, you can create these source files using Tcl commands or scripts, but you must manually manage your source files. The majority of this chapter covers creating and managing sources in Project Mode. Working with Sources in Non-Project Mode covers creating and managing sources in Non-Project Mode. For more information on Project and Non-Project design flow modes, see the Vivado Design Suite User Guide: Design Flows Overview (UG892).
When source files are added to the Vivado Design Suite, whether in Project Mode or Non-Project Mode, the tool maintains both a relative path and an absolute path to the file. When a design is opened, by default the Vivado Design Suite applies the relative path first to locate files and directories, then applies the absolute path if the file is not found. This feature is controlled through the PATH_MODE property, which defaults to RelativeFirst. You can change this behavior for specific design sources by setting the PATH_MODE property for those files. Refer to the PATH_MODE property in Vivado Design Suite Properties Reference Guide (UG912) for more information.