Solution Synthesis - Solution Synthesis - 2025.2 English - UG1504

Versal Adaptive SoC System and Solution Planning Methodology Guide (UG1504)

Document_ID
UG1504
Release_Date
2025-12-17
Version
2025.2 English

Based on the analysis done in the requirements gathering, you can start putting together a strawman proposal of what the solution is going to be, how it is partitioned across the hardware subsystems (AI Engine, PL, and PS), and what resource count is expected to be used. The following is a framework for how this process must be structured.

Assess suitability to AI Engine processing:

  • Suitable data type support exists
  • Nature of processing aligns with Kahn Process Networks
  • Is the algorithm vectorizable to leverage SIMD?
  • Establish a workable data flow and routing amendable to AI Engine array

Partition remaining algorithms to PL and PS:

  • Identify an initial system partitioning and required data flow
  • Identify partition of data/user plane and control plane functions
  • Identify role of PS in overall system management

Identify system data flow:

  • Device interfaces (JESD, PCIe, MRMAC, MIPI)
  • Identify key storage locations in the design (DDR4 vs. PL UltraRAM vs. AI Engine mem tile vs. AI Engine local tile)
  • Identify NoC usage