Check Timing Report - Check Timing Report - 2025.2 English - UG1387

Versal Adaptive SoC Hardware, IP, and Platform Development Methodology Guide (UG1387)

Document_ID
UG1387
Release_Date
2025-12-17
Version
2025.2 English

The no_clock check reports the groups of active leaf clock pins with no clock definition. Each group is associated with a clock source point where a clock must be defined to clear the issue.

% check_timing -override_defaults no_clock
1. checking no_clock
--------------------
 There are 15633 register/latch pins with no clock driven by root clock pin: sysClk 
(HIGH)
There are 148 register/latch pins with no clock driven by root clock pin: 
mgtEngine/ROCKETIO_WRAPPER_TILE_i/gt0_ROCKETIO_WRAPPER_TILE_i/gtxe2_i/TXOUTCLK 
(HIGH)
There are 8 register/latch pins with no clock driven by root clock pin: 
usbClkDiv2_reg/C (HIGH)

With check_timing, the same clock source pin or port can appear in several groups depending on the topology of the entire clock tree. In such case, creating a clock on the recommended source pin or port will resolve the missing clock definition for all the associated groups.

Note: For more information, see this link in the Versal Adaptive SoC System Integration and Validation Methodology Guide (UG1388).