Input Files:
Vivado project from Example 1 in Using the Zynq SoC Processing System
Vitis workspace in Example 2 in Using the Zynq SoC Processing System
Output Files:
Updated hardware handoff
system_wrapper.xsahello_pl.elf
Input Files:
Vivado project from Example 1 in Using the Zynq SoC Processing System
Vitis workspace in Example 2 in Using the Zynq SoC Processing System
Output Files:
Updated hardware handoff system_wrapper.xsa
hello_pl.elf