Debugging Using Vivado Simulator - 2025.1 English - UG937

Vivado Design Suite Tutorial: Logic Simulation (UG937)

Document ID
UG937
Release Date
2025-06-11
Version
2025.1 English

AMD Vivado™ simulator supports System Verilog feature. In this exercise, you will explore the System Verilog feature using the following:

  • Scope Window
  • Object Window
  • Tcl Console