The Vivado simulator supports:
- VHDL, see IEEE Standard VHDL Language Reference Manual (IEEE-STD-1076-1993) and part of VHDL-2008.
- Verilog, see IEEE Standard Verilog Hardware Description Language (IEEE-STD-1364-2001).
- SystemVerilog, see IEEE Standard for SystemVerilog--Unified Hardware Design, Specification, and Verification Language (IEEE-STD-1800-2012).
- IEEE P1735 encryption, see Recommended Practice for Encryption and Management of Electronic Design Intellectual Property (IP) (IEEE-STD-P1735).