Connectivity Peripherals - 2025.1 English - UG1273

Versal Adaptive SoC Design Guide (UG1273)

Document ID
UG1273
Release Date
2025-05-29
Version
2025.1 English

In the processing system, many peripherals are used to connect to external devices over industry-standard protocols, including CAN-FD, SPI, USB, Ethernet, I2C, and UART. Many of the peripherals support clock gating and power gating modes to reduce dynamic and static power consumption. These peripherals either use multiplexed I/O (MIO) to connect to the external components, or if required, they can also be routed into and through the PL using the extended multiplexed I/O (EMIO).

Table 1. Connectivity Comparison
  Versal AI Edge Series, Versal AI Core Series, Versal Prime Series, Versal Premium Series, and Versal HBM Series Versal AI Edge Series Gen 2 and Versal Prime Series Gen 2
High-Speed Connectivity Ethernet (x2) PCI Express Gen5 x4 (x1); USB 3.2 (x1); DisplayPort 1.4 (x1); 10G Ethernet (x1); 1G Ethernet (x1); UFS 3.1 (x1)
General Connectivity UART (x2); CAN-FD (x2); USB 2.0 (x1); SPI (x2); I2C (x2) CAN/CAN-FD (x2); SPI (x2); UART (x2); USB 2.0 (x2); I2C/I3C (x2); GPIO