Design Rule Checks - Design Rule Checks - 2024.2 English - UG904

Vivado Design Suite User Guide: Implementation (UG904)

Document ID
UG904
Release Date
2024-11-14
Version
2024.2 English

Before starting placement, Vivado implementation runs Design Rule Checks (DRCs), including user-selected DRCs from report_drc, and built-in DRCs internal to the Vivado placer. Internal DRCs check for illegal placement, such as Memory IP cells without LOC constraints and I/O banks with conflicting IOSTANDARDs.